nsu1_perf_mon_ctl_0_1 (DDRMC_NOC) Register Description
| Register Name | nsu1_perf_mon_ctl_0_1 |
|---|---|
| Offset Address | 0x000000051C |
| Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507. |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Performance monitor 0 control NSU1 |
nsu1_perf_mon_ctl_0_1 (DDRMC_NOC) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| bew | 7 | rwNormal read/write | 0x0 | Best effort write QoS class |
| isow | 6 | rwNormal read/write | 0x0 | Isochronous write QoS class |
| ber | 5 | rwNormal read/write | 0x0 | Best effort read QoS class |
| isor | 4 | rwNormal read/write | 0x0 | Isochronous read QoS class |
| llr | 3 | rwNormal read/write | 0x0 | Low latency read QoS class |
| lat_sel | 2 | rwNormal read/write | 0x0 | 0: start of burst 1: end of burst |
| tb_sel | 1:0 | rwNormal read/write | 0x0 | Select one of 4 available intervals: 0: timebase0 1: timebase1 2: timebase2 3: limebase3 |