REG_PCSR_LOCK (HBMMC_NA1) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)

Document ID
AM019
Release Date
2023-11-17
Revision
1.1

REG_PCSR_LOCK (HBMMC_NA1) Register Description

Register NameREG_PCSR_LOCK
Offset Address0x000000000C
Absolute Address This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width32
TyperwNormal read/write
Reset Value0x00000001
DescriptionNPI Lock Register

REG_PCSR_LOCK (HBMMC_NA1) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
STATE 0rwNormal read/write0x1Disables write access to all registers when set to 0x1. A write to any register other than the PCSR_LOCK register will receive a slave error if PCSR_LOCK.STATE=0x1.
Write 0xF9E8D7C6 to PCSR_LOCK to set the STATE bit to 0x0 and enable write access to all other registers.
Write any value other than 0xF9E8D7C6 to PCSR_LOCK to set the STATE bit to 0x1 to disable write access to all other registers.