xmpu_config9 (DDRMC_NOC) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)

Document ID
AM019
Release Date
2023-11-17
Revision
1.1

xmpu_config9 (DDRMC_NOC) Register Description

Register Namexmpu_config9
Offset Address0x00000101EC
Absolute Address This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000008
DescriptionXMPU entry config

xmpu_config9 (DDRMC_NOC) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:5razRead as zero0x00: Relaxed - secure master my access non secure
1: Strict - secure master may only access secure region
NSCheckType 4rwNormal read/write0x00: Relaxed - secure master my access non secure
1: Strict - secure master may only access secure region
RegionNS 3rwNormal read/write0x10: Secure
1: Nonsecure
WrAllowed 2rwNormal read/write0x00: not allowed, transaction poisoned
1: allowed
RdAllowed 1rwNormal read/write0x00: not allowed, transaction poisoned
1: allowed
enable 0rwNormal read/write0x0Entry enable
0: Region disabled, configuration may be changed at any time including runtime
1: Region enabled