REG_PERF_FLT1_CMP_S2 (NOC_NSU) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)

Document ID
AM019
Release Date
2023-11-17
Revision
1.1

REG_PERF_FLT1_CMP_S2 (NOC_NSU) Register Description

Register NameREG_PERF_FLT1_CMP_S2
Offset Address0x00000001BC
Absolute Address This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width32
TyperwNormal read/write
Reset Value0x00000000
Descriptionmonitor filter-0 compare value set 0

REG_PERF_FLT1_CMP_S2 (NOC_NSU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
axsize_max14:12rwNormal read/write0x0max AxSize
axqos_max11:8rwNormal read/write0x0max AxQoS
axlen_max 7:0rwNormal read/write0x0max AxLen