HBMMC_MC_PM_QUEUE_TOT_CMD_CNT_PC1 (HBMMC_MC) Register Description
| Register Name | HBMMC_MC_PM_QUEUE_TOT_CMD_CNT_PC1 |
|---|---|
| Offset Address | 0x0000000298 |
| Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507. |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | Performance Monitor Average QUEUE Total Command Count |
Alternate register name: HBMMC_MC_PM_QUEUE TOT_CMD_CNT_PC1
HBMMC_MC_PM_QUEUE_TOT_CMD_CNT_PC1 (HBMMC_MC) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| PM_QUEUE_TOT_CMD_LVL | 31:0 | roRead-only | 0x0 | Average of DRAM TOT command count resident in scheduling queue Note: Field name reference: PM_QUEUE TOT_CMD_LVL |