REG_28 (CMT_XPLL) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)

Document ID: AM019
Release Date: 2023-11-17
Revision: 1.1

REG_28 (CMT_XPLL) Register Description

Register Name	REG_28
Offset Address	0x0000000098
Absolute Address	This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width	32
Type	mixedMixed types. See bit-field details.
Reset Value	0x00000000
Description	REG_28

REG_28 (CMT_XPLL) Register Bit-Field Summary

Field Name	Bits	Type	Reset Value	Description
Reserved	31:15	razRead as zero	0x0	Chooses the skew value of the interpolator.i.e a fixed offset step value
INTERP3_SKEW	14:10	rwNormal read/write	0x0	Chooses the skew value of the interpolator.i.e a fixed offset step value
INTERP3_SEL	9:8	rwNormal read/write	0x0	2'b00: Interpolator is not controlled by neither DESKEW_PD nor Phase Shift Interface,2'b01: Interpolator is controlled by DESKEW_PD,2'b10: Interpolator is controlled by Phase Shift Interface
Reserved	7	roRead-only	0x0	Chooses the skew value of the interpolator.i.e a fixed offset step value
INTERP2_SKEW	6:2	rwNormal read/write	0x0	Chooses the skew value of the interpolator.i.e a fixed offset step value
INTERP2_SEL	1:0	rwNormal read/write	0x0	2'b00: Interpolator is not controlled by neither DESKEW_PD nor Phase Shift Interface,2'b01: Interpolator is controlled by DESKEW_PD,2'b10: Interpolator is controlled by Phase Shift Interface