REG_PERF_MON1_CNT_AND_OFL (NOC_NMU) Register

NoC and Integrated Memory Controller NPI Register Reference (AM019)

Document ID
AM019
Release Date
2023-11-17
Revision
1.1

REG_PERF_MON1_CNT_AND_OFL (NOC_NMU) Register Description

Register NameREG_PERF_MON1_CNT_AND_OFL
Offset Address0x00000008A4
Absolute Address This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507.
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionMonitor-1 overflows & byte count (upper)

REG_PERF_MON1_CNT_AND_OFL (NOC_NMU) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
byte_cnt_ofl12rwNormal read/write0x0Byte count overflow
burst_cnt_ofl11rwNormal read/write0x0Burst count overflow
latency_acc_ofl10rwNormal read/write0x0Accumulated latency overflow
latency_max_ofl 9rwNormal read/write0x0Maximum latency overflow
latency_min_ofl 8rwNormal read/write0x0Minimum latency overflow
byte_cnt_upr 7:0rwNormal read/write0x0Total byte count upper 8 bits