Interfacing with Ethernet MAC Peripherals in Device PS - 16.2 English - PG047

This module creates the sgmii_clk_en and sgmii_ddr_clk_en clock enable signals for use throughout the SGMII adaptation module. The following figure shows the clock enable signal for the Clock Generation module at 1 Gbps and 100 Mbps speeds.

Figure 1. Clock Enable Signal for the Clock Generation Module

The above figure also shows the formation of the sgmii_clk_r signal. sgmii_clk_r is forwarded to the Ethernet Mac Peripheral through gmii_tx_clk port and gmii_rx_clk port. This provides SGMII clock forwarding at the correct frequency.