Using the core with a device-specific transceiver provides the functionality to implement
the 1000BASE-X or 2500BASE-X PCS and PMA sublayers. Alternatively, it can be used to
provide a GMII to SGMII bridge.
The core interfaces to a device-specific transceiver, which provides some of the PCS
layer functionality such as 8B/10B encoding/decoding, the PMA Serializer/Deserializer
(SerDes), and clock recovery. The following figure shows the PCS sublayer functionality
and the major functional blocks of the core. A description of the functional blocks and
signals is provided in subsequent sections.
Figure 1. Core Block Diagram Using a Device-Specific Transceiver