When this register is configured to perform the 1000BASE-X standard, registers 0 to 16 should be interpreted as per 1000BASE-X or 2500BASE-X Standard Using Optional Auto-Negotiation or 1000BASE-X or 2500BASE-X Standard without Optional Auto-Negotiation.
When this register is configured to perform the SGMII standard, registers 0 to 16 should be interpreted as per SGMII Standard Using Optional Auto-Negotiation or 1000BASE-X or 2500BASE-X Standard without Optional Auto-Negotiation. This register can be written to at any time. See Dynamic Switching of 1000BASE-X and SGMII for more information.
Bits | Name | Description | Attributes | Default Value |
---|---|---|---|---|
17.15:1 | Reserved | Always return 0s | Returns 0s | 000000000000000 |
16.0 | Standard |
0 = Core performs to the 1000BASE-X standard. Registers 0 to 16 behave as per 1000BASE-X or 2500BASE-X Standard Using Optional Auto-Negotiation 1= Core performs to the SGMII standard. Registers 0 to 16 behave as per SGMII Standard Using Optional Auto-Negotiation. |
R/W | Determined by the basex_or_sgmii port |