The demonstration test bench performs the following tasks:
- Input clock signals are generated.
- A reset is applied to the example design.
- The core is configured using the Configuration Vector to take the core out of the Isolate state.
- Four frames are injected into the GMII transmitter by the GMII stimulus block.
- the first frame is a minimum length frame
- the second frame is a type frame
- the third frame is an errored frame
- the fourth frame is a padded frame
- The data at the TBI/transceiver transmitter interface is converted to 10-bit parallel data (for the transceiver only, not when the TBI is used), then 8B/10B decoded. The resultant frames are checked by the TBI/PMA/SGMII Monitor against the stimulus frames injected into the GMII transmitter to ensure data integrity.
- The same four frames are generated by the TBI/PMA/SGMII Stimulus block. These are 8B/10B encoded, converted to serial data (for the transceivers only, not when the TBI is used) and injected into the TBI/transceiver receiver interface.
- Data frames received at the GMII receiver are checked by the GMII Monitor against the stimulus frames injected into the TBI/transceiver receiver to ensure data integrity.