Parameters Added from v15.1 to v15.2 - 16.2 English

1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP Product Guide (PG047)

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16.2 English

The following table lists the parameters changes from v15.1 of the core to v15.2.

Table 1. Parameters Added in v15.2
Generic Name Applicability Description Values
RxGmiiClkSrc Applicable only when the physical interface is the transceiver. This parameter selects the clock for the receive side of the core as TXOUTCLK or RXOUTCLK. The fabric elastic buffer is not required when RXOUTCLK is selected because the RX datapath is synchronous to the recovered clock. Therefore, the SGMII Capabilities tab for SGMII speed selection is not required. TXOUTCLK (default) RXOUTCLK
GTinEx Applicable only when Include_shared_logic_in_Example_Design is selected for UltraScale and UltraScale+ devices. When this parameter is selected, the Gigabit transceiver is pulled to shared level instance from the core. True False (default)
GT_Type Applicable only for UltraScale and UltraScale+ devices with GTH and GTY transceiver types. Selects the transceiver type to be generated. GTH (default) GTY