Product Specification - 16.2 English

1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP Product Guide (PG047)

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16.2 English

The following figure shows the 1 Gigabit Ethernet PCS and PMA sublayers provided by this core, which are part of the Ethernet architecture. The MAC and all the blocks to the right are defined in the IEEE 802.3-2008 specification. The figure also shows where the supported interfaces fit into the architecture.

Figure 1. Overview of Ethernet Architecture Ethernet 1000BASE-X PCS/PMA or SGMII Page-1 Sheet.1 PMD PMD Sheet.2 PMA PMA Sheet.3 PCS PCS Sheet.4 MAC MAC Sheet.5 Sheet.6 FIFO I/F FIFOI/F Sheet.7 IP IP Sheet.8 TCP TCP Sheet.9 GMII / SGMII GMII /SGMII Sheet.10 TBI TBI Sheet.11 Transceiver Serial TransceiverSerial Sheet.12 Sheet.13 Sheet.14 Sheet.15 X12783 X12783 Standard Arrow.14 Standard Arrow.10 Standard Arrow.11 Standard Arrow.12 Standard Arrow.13 Standard Arrow.21