Idle Character Removal at 1 Gbps (1000BASE-X and SGMII) - 16.2 English

1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP Product Guide (PG047)

Document ID
PG047
Release Date
2023-11-01
Version
16.2 English

The minimum number of clock cycles that can be presented to an Ethernet receiver, according to the IEEE 802.3-2008 specification, is 64-bit times at any Ethernet speed. At 1 Gbps 1000BASE-X and SGMII, this corresponds to 8 bytes (8 clock cycles) of interframe gap. However, an interframe gap consists of many code groups, namely /T/, /R/, /I1/ and /I2/ characters (see 1000BASE-X State Machines). Of these, only /I2/ can be used as clock correction characters.

In a minimum interframe gap at 1 Gbps, you can only assume that two /I2/ characters are available for removal. This corresponds to 4 bytes of data.

Looking at this from another perspective, 4 bytes of data need to be removed in an elastic buffer (which is filling during frame reception) for a frame which is 5000 x 4 = 20000 bytes in length. So if the frame being received is 20000 bytes in length or shorter, at 1 Gbps, you can assume that the occupancy of the elastic buffer will always self correct to half full before the start of the subsequent frame.

For frames that are longer than 20000 bytes, the assumption that the elastic buffer will be restored to half full occupancy does not hold true. For example, for a long stream of 250000 byte frames, each separated by a minimum interframe gap, the receive elastic buffer will eventually fill and overflow. This is despite the 250000 byte frame length being less than the maximum frame size calculated in the Receive Elastic Buffers: Depths and Maximum Frame Sizes section.

However, because the legal maximum frame size for Ethernet frames is 1522 bytes (for a VLAN frame), idle character removal restrictions are not usually an issue.