MDIO Bus System - 16.2 English

1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP Product Guide (PG047)

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16.2 English

The MDIO interface for 1 Gbps operation (and slower speeds) is defined in IEEE 802.3-2008, clause 22. The following figure shows an example MDIO bus system. This two-wire interface consists of a clock (MDC) and a shared serial data line (MDIO). The maximum permitted frequency of Management Data Clock (MDC) is set at 2.5 MHz. An Ethernet MAC is shown as the MDIO bus master (the Station Management (STA) entity). Two PHY devices are shown connected to the same bus, both of which are MDIO slaves (MDIO Managed Device (MMD) entities).

Figure 1. A Typical MDIO-Managed System Ethernet 1000BASE-X PCS/PMA or SGMII Page-1 Sheet.1 Sheet.2 X12813-081716 X12813-081716 Sheet.3 Sheet.4 Sheet.5 Sheet.6 Configuration Registers 0 to 31 (REGAD) ConfigurationRegisters 0 to 31(REGAD) Sheet.7 Sheet.8 Sheet.9 Sheet.13 MDIO slave MDIO slave Sheet.14 PHY1 (MMD) PHY1 (MMD) Sheet.15 Physical Address (PHYAD) = 1 Physical Address(PHYAD) = 1 Sheet.16 Sheet.17 Sheet.18 Sheet.19 Sheet.20 Configuration Registers 0 to 31 (REGAD) ConfigurationRegisters 0 to 31(REGAD) Sheet.21 Sheet.22 MDIO slave MDIO slave Sheet.23 PHY2 (MMD) PHY2 (MMD) Sheet.24 Sheet.25 Host Bus I/F HostBus I/F Sheet.26 Sheet.27 Sheet.28 MDIO master MDIOmaster Sheet.29 MAC (STA) MAC (STA) Sheet.30 Sheet.31 MDC MDC Sheet.32 MDIO MDIO Sheet.33 Physical Address (PHYAD) = 2 Physical Address(PHYAD) = 2 Standard Arrow.47 Standard Arrow.4 Connector Dot Sheet.38 Sheet.39 Connector Dot.23 Standard Arrow.19 Standard Arrow.25 Sheet.10 Sheet.11 Standard Arrow.13

The MDIO bus system is a standardized interface for accessing the configuration and status registers of Ethernet PHY devices. In the example shown, the Management Host Bus I/F of the Ethernet MAC is able to access the configuration and status registers of two PHY devices using the MDIO bus.