-
Enable ADC
- Select if the selected converter within the selected tile is
enabled. Valid values are TRUE and FALSE.
-
Invert Q Output
- This parameter is configurable only when I/Q output data is
selected and the fine mixer is enabled. When set, the quadrature output of the
mixer is negated. This allows -Q data to be generated.
-
Dither
- Selects if dither is enabled for the selected tile. Dither
should be enabled unless the sample rate is under 0.75 times the maximum
sampling rate for the RF-ADC.
-
Bypass Background
Calibration
(Gen 1 and Gen 2)
- If checked, the background calibration logic is implemented in
the IP logic rather than in the RF-ADC. The
driver can be used to download a fixed set of calibration coefficients to the
IP. This option is only available in Real input to Real output mode with further
restrictions on the decimation mode and the number of samples per AXI4-Stream cycle.
-
Enable TDD Real Time Ports (Gen 3
/DFE)
- When enabled, the
tdd_mode
port is added to the IP. This enables powers savings to be made by powering down
sections of the RF-ADC.