| Bit | Default Value | Access Type | Description |
|---|---|---|---|
| 31:5 | - | - | Reserved (read back 0) |
| 4 | 0 | RO Clear On Read | Common interrupt bit. Asserted when the power-on state machine has encountered an error during the start up process |
| 3 | 0 | RO | Converter 3 interrupt bit |
| 2 | 0 | Converter 2 interrupt bit | |
| 1 | 0 | Converter 1 interrupt bit | |
| 0 | 0 | Converter 0 interrupt bit |