RF-DAC Interpolation Filters (Gen 1/Gen 2) - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

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2.6 English

Interpolation filters are required to implement the up-sampling and filtering portions of the DUC process. The implemented filter operation consists of three low pass FIR filters, each with a predetermined, fixed set of coefficients, shown in the following figure. Each filter block can be bypassed and the output of each filter block can be routed to the output of the filter.

  • 1x—all filter stages are bypassed
  • 2x—interpolation using a single stage
  • 4x—interpolation using two stages
  • 8x—interpolation using all three available stages
Figure 1. RF-DAC Interpolation Filter (Gen 1/Gen 2)

The output of an interpolated signal is the exact representation of the original signal presented at a higher sampling rate. Up-sampling of a signal sampled at F1 to a higher sample rate (N*F1) results in N replications of the original spectrum. Low pass filtering of the result helps to remove unwanted replications resulting in the preservation of the original signal at the required higher sample rate.

Table 1. Interpolation Filter Operating Modes (Gen 1/Gen 2)
Mode Description
OFF Filter is disabled, RF-DAC is not available.
1x Filter is bypassed.
2x 2x interpolation, 80% Nyquist passband.
4x 4x interpolation, 80% Nyquist passband.
8x 8x interpolation, 80% Nyquist passband.

Each of the filter stages can overflow—given the step-response of a FIR filter, especially when full-scale data is on the input. Each filter stage has an overflow status signal and output saturation to detect an overflow and protect the datapath. When a filter stage is not used, the overflow flag is pulled Low. These flags are connected to the datapath interrupts mechanism.