struct XRFdc_ADCTile_Config - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2024-05-30
Version
2.6 English

This structure is for internal driver use.

u32 Enable;
u32 PLLEnable;
double SamplingRate
double RefClkFreq; 
double FabClkFreq;
u32 FeedbackDiv;
u32 OutputDiv;
u32 RefClkDiv;
u32 MultibandConfig;
XRFdc_ADCBlock_AnalogDataPath_Config ADCBlock_AnalogConfig[4];
XRFdc_ADCBlock_DigitalDataPath_Config ADCBlock_Digital_Config[4];

Description

u32 Enable
Corresponds to the C_ADC{x}_Enable IP parameter.
u32 PLLEnable
Corresponds to the C_ADC{x}_PLL_Enable IP parameter.
double SamplingRate
Corresponds to the C_ADC{x}_Sampling_Rate IP parameter.
double RefClkFreq
Corresponds to the C_ADC{x}_RefClk_Freq IP parameter.
double FabClkFreq
Corresponds to the C_ADC{x}_FabClk_Freq IP parameter.
u32 FeedbackDiv
Corresponds to the C_ADC{x}_FBDIV IP parameter.
u32 OutputDiv
Corresponds to the C_ADC{x}_OutDiv IP parameter.
u32 RefClkDiv
Corresponds to the C_ADC{x}_Refclk_Div IP parameter.
u32 MultibandConfig
Corresponds to the C_ADC{x}_Multiband IP parameter.