Decimation Filter Use - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

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2.6 English

The IP core is used to set the decimation rate. This is set in the Vivado IDE because changing the decimation rate directly affects the physical interface as the bandwidth to the PL changes. The filters that are enabled are as shown in the following figure. Enable the RF-ADC by checking the Enable ADC check box. See RF-ADC Converter Configuration for information on the settings.

Figure 1. RF-ADC Decimation Filter Configuration