DSA Operation Details (Gen 3/DFE) - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2024-05-30
Version
2.6 English

The on-chip DSA supports two behaviors as follows:

  1. User selection of attenuation value using direct programmable logic input.
  2. Automatic attenuation value forced or disabled (together with buffer) on Over-Voltage events.

A 5-bit real-time signal (dsa_code) from the PL sets the DSA value directly as per the following formula.

  • DSA Value (dB) = range - dsa_code * step size

The range of dsa_code is from 0 to the maximum allowed code which maps to a DSA value from the maximum attenuation value to 0 dB with the step size and range defined in Zynq UltraScale+ RFSoC Data Sheet: DC and AC Switching Characteristics (DS926); other dsa_code values are invalid. For example, assuming the range of DSA is 27 dB and the step size is 1 dB, if you want to have a DSA value of 10 dB, the dsa_code value will be 17 (27 - 10) and the dsa_code is 0b10001. When the DSA ports are not enabled the IP sets the attenuation to 0 dB.

The dsa_code is updated with a rising edge on the trigger signal (dsa_update). Both dsa_code and dsa_update are synchronous to the s_axi_aclk signal, it is recommended to change the dsa_code and then apply the update at least 1 s_axi_aclk later. Once captured by s_axi_aclk, the trigger signal is asynchronous which allows for the fastest operation, and it is distributed to all channels within a tile to allow for simultaneous updates of the DSA codes. Updates only take effect when the power-up state machine has reached the done state. The propagation delay from a dsa_update assertion to code change at digital output is around 400 T1 for dual RF-ADC and 220 T1 for quad RF-ADC, respectively.

Note: The exact update moment is dependent on the local synchronization of the trigger within the analog circuitry; therefore there are a few sample clock cycles of uncertainty on the actual update time.

The default attenuation is set by the dsa_code input when real-time DSA signal interface is enabled. When the IP starts up initially (or after s_axi_aresetn is driven Low), the attenuation will be dependent on this input (without needing to assert dsa_update). When the real-time DSA signal interface is not enabled the default attenuation is 0 dB.

There are also RFdc APIs available to set and get the DSA values in dB. The API updates each channel independently and the response time is slower than the real time port updates. There is no change to the attenuation when the XRFDC_Reset API or XRFDC_Restart API is called.