Advanced Tab - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2024-05-30
Version
2.6 English
Figure 1. Advanced Tab (Gen 1/Gen 2)

Figure 2. Advanced Tab (Gen 3/DFE)

RF Analyzer
The RF Analyzer provides a hardware test system. The system contains data stimulus and capture blocks configured for this instance of the IP core.
PL Clock Frequency (MHz)
If multi-tile sync is selected, then you must supply a PL clock and PL SYSREF to the system. For accurate SYSREF capture, the frequency must be a common integer multiple of the RF-ADC and RF-DAC AXI4-Stream clocks.