Real-Time VOP Signal Interface Ports for RF-DACs (Gen 3/DFE) - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2024-05-30
Version
2.6 English
Table 1. Real Time VOP Signal Interface Ports for RF-DACs
Port Name 1 I/O Clock Description
dacXY_vop_code[9:0] In s_axi_aclk RF-DAC Variable Output Power codeword.
dacXY_update_vop In s_axi_aclk RF-DAC Variable Output Power update. Assert for one cycle to instigate an update to the VOP settings.
dacXY_vop_done Out s_axi_aclk RF-DAC Variable Output Power done. Asserted for one cycle when the update process is completed successfully.
dacX_vop_busy Out s_axi_aclk RF-DAC Variable Output Power busy. Asserted when an update is in progress.
  1. X refers to the location of the tile in the converter column. Y refers to the location of the RF-DAC block in the tile (0 to 3).