To apply the digital gain compensation at the correct moment, the relative latency
between the propagation of the gain change through the analog
path must be aligned with the propagation of the digital gain
update code through the digital path. Because the external VGA
communication and response time is specific to the user
application, these relative delays must be measured in-system.
For the digital path, each tile has a dedicated input called
adcXY_pl_event
that can be used to
apply a setting, such as gain, at a deterministic time. To
determine the relative delay between the digital and analog
paths, a test signal of constant amplitude should be applied
during the design phase, and digital and analog gain adjustments
applied. Looking at the output data, the delta time between the
digital and analog gain application moments can be observed as a
hump/through in the output signal amplitude. This delta time
should be added to the adcXY_pl_event
assertion
in by counting periods of the RF-ADC output clock
(clk_adcX
). Using this
predetermined delay during normal operation of the design
ensures that the gain application moments are aligned.
The following figure illustrates the stages of responding to a threshold event for an example AGC application. The middle region of the diagram represents signals related to the analog/VGA path, while the lower region represents signals related to the digital path.
As shown in this figure, the AGC update is initiated by the assertion of a
threshold. In response to this the AGC algorithm in the PL
calculates gain adjustments to be made for both the analog and
digital paths. The propagation of the delay through the analog
path is shown by the VGA update write, VGA settling response,
and RF-ADC latency. The
propagation delay through the digital path is shown by the API
write of the new gain value, denoted by
TRFdc_API
, and the
adcXY_pl_event
assertion, denoted
by TDelta_Latency.
TDelta_Latency
is chosen by the
user application to match the Digital and Analog latencies.
After the digital gain update has been applied, the threshold
can be automatically deasserted, if the Auto-Clear function is
enabled.
It should be noted that the application of the QMC gain using the RFDC driver API
might incur some driver overhead. In applications where this
latency is undesirable, the PL Digital Gain Compensation method
can be used by issuing an adcXY_pl_event
after
the event source has been set by a call to the
XRFdc_SetQMCSettings
API
function.