Changes from V1.1 to V1.2 - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)
Document ID
PG269
Release Date
2024-05-30
Version
2.6 English

Port Changes

When the RF-ADC real-time signals are enabled the ports in the following table have been added.

Table 1. Port Changes in Version 1.2
Port Direction Upgrade Action
2 GSPS RF-ADC 1
adcXZ_over_range Out Leave open
adcXZ_over_voltage Out Leave open
4 GSPS RF-ADC 2
adcX_ZZ_over_range Out Leave open
adcX_ZZ_over_voltage Out Leave open
  1. X refers to the location of the tile in the converter column. Z refers to the location of the RF-ADC in the tile (0 to 3).
  2. X refers to the location of the tile in the converter column. ZZ is either 01 (the lower RF-ADC in the tile) or 23 (the upper RF-ADC in the tile).

When the RF-ADC real-time signals are enabled the ports in the following table have been renamed.

Table 2. Ports Renamed in Version 1.2
Port Previous Name (v1.1) Direction Upgrade Action
2 GSPS RF-ADC 1
adcXZ_over_threshold1 adcXY_over_threshold1 Out Leave open
adcXZ_over_threshold2 adcXY_over_threshold2 Out Leave open
4 GSPS RF-ADC 2
adcX_ZZ_over_threshold1 adcXY_over_threshold1 Out Leave open
adcX_ZZ_over_threshold2 adcXY_over_threshold2 Out Leave open
  1. X refers to the location of the tile in the converter column. Y refers to the location of the DDC block in the tile (0 to 3). Z refers to the location of the RF-ADC in the tile (0 to 3).
  2. X refers to the location of the tile in the converter column. Y refers to the location of the DDC block in the tile (0 to 3). ZZ is either 01 (the lower RF-ADC in the tile) or 23 (the upper RF-ADC in the tile).

Parameter Changes

There are no parameter changes.