Automatic Gain Control Systems - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

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2.6 English

Automatic gain control (AGC) is commonly used in RF-ADC applications where the dynamic range of the input can vary considerably. It provides a way of using the input range of the RF-ADC and maximizing Signal-to-Noise ratio (SNR), while at the same time offering the flexibility to respond to varying signal amplitudes.

AGC systems consist of the following components:

  • Variable Gain Amplifier (VGA)
  • RF-ADC
  • Signal amplitude monitoring
  • AGC Algorithm/Decision logic
  • Digital gain compensation

The AMD Zynq™ UltraScale+™ RFSoC RF-ADC channels allow the implementation of custom AGC solutions by integrating the signal amplitude monitoring and compensation features into the RF-ADC tiles. These features can be used with an external VGA and AGC logic embedded in the FPGA PL. Zynq UltraScale+ RFSoC Gen 3/DFE devices integrate DSA in each RF-ADC tile. This is shown in the following figure.

Figure 1. Automatic Gain Control

This figure shows an example AGC application. The signal amplitude monitoring is implemented within each RF-ADC channel using the threshold feature. This feature provides two thresholds that can be programmed per RF-ADC channel. When a threshold level is violated, this is indicated directly in the PL, thereby bypassing any latency within the datapath.

A sample high level operation of the AGC is as follows:

  1. At system initialization, the threshold levels and modes, including enabling the threshold clearing function from the PL, are set by the RFdc driver API.
  2. If a threshold level is violated:
    1. The real-time over threshold output flags assert.
    2. The PL-based AGC algorithm makes a decision and computes the new VGA gain and compensation gain
    3. Gain values are programmed into the VGA and digital compensation logic
    4. adcXY_pl_event is asserted by the AGC logic.
    5. Thresholds are cleared.