RF-DAC Interpolation Filters (Gen 3/DFE) - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

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2.6 English

The following diagram shows the interpolation filter stages in Gen 3/DFE.

Figure 1. Interpolation Filter Hierarchy

There are four stages of interpolation filters cascaded; each interpolation stage can be bypassed independently. The FIR1 stage contains three interpolation filters - FIR1a (2x), FIR1b (3x), and FIR1c (5x) - only one of them can be enabled for a specified configuration. The FIR2, FIR3, and FIR4 blocks all have an interpolation factor of 2. Using a combination of filters the following list shows all possible interpolation factors:

1x (bypass), 2x, 3x, 4x, 5x, 6x, 8x, 10x, 12x, 16x, 20x, 24x, 40x