Changes from V2.2 to V2.3 - 2.6 English

Zynq UltraScale+ RFSoC RF Data Converter v2.6 Gen 1/2/3/DFE LogiCORE IP Product Guide (PG269)

Document ID
PG269
Release Date
2024-05-30
Version
2.6 English

Parameter Changes

There are no parameter changes.

Port Changes

When the RF-ADC real-time signals are enabled the following ports have been added.

Table 1. Port Changes in Version 2.3
Port Direction Upgrade Action
2 GSPS RF-ADC 1
adcXY_clear_or In Tie low
4 GSPS RF-ADC 2
adcX_ZZ_clear_or In Tie low
  1. X refers to the location of the tile in the converter column. Y refers to the location of the RF-ADC in the tile (0 to 3).
  2. X refers to the location of the tile in the converter column. ZZ is either 01 (the lower RF-ADC in the tile) or 23 (the upper RF-ADC in the tile)

Other Changes

The real-time signal interfaces have been updated to use the AMD Vivado™ interface definitions.

Table 2. Interface Changes in Version 2.3
Interface Previous Version Current Version Notes
Real-Time Signal Interface for RF-DACs display_usp_rf_data_converter:rts_pins_rtl interface:rfdc_rts_pins_rtl Update interface type on connected modules.
Real-Time Signal Interface for RF-ADCs display_usp_rf_data_converter:rts_pins_rtl interface:rfdc_rts_pins_rtl Update interface type on connected modules.
Real-Time NCO Signal Interface for RF-DACs display_usp_rf_data_converter:nco_pins_rtl interface:rfdc_nco_pins_rtl Update interface type on connected modules.
Real-Time NCO Signal Interface for RF-ADCs display_usp_rf_data_converter:nco_pins_rtl interface:rfdc_nco_pins_rtl Update interface type on connected modules.