Serial Interface - 8.11 English

CPRI LogiCORE IP Product Guide (PG056)

Document ID

PG056

Release Date

2022-11-16

Version

8.11 English

Note: This section is not applicable for Versal ACAP cores.

Table: Serial Interface Signals shows the serial interface of the CPRI core.

Table 3-28: Serial Interface Signals
Port	Direction	Clock Domain	Description
txp	Out	TX Serial Clock	Positive differential serial output from the transceiver
txn	Out	TX Serial Clock	Negative differential serial output from the transceiver
rxp	In	RX Serial Clock	Positive differential serial input to the transceiver
rxn	In	RX Serial Clock	Negative differential serial input to the transceiver
txinhibit	Out	Async	Transmit inhibit
lossoflight	In	Recovered Clock	Loss of Light input. Indicates to the core a lack of illumination of optical receiver. Tie to 0 if not used.

The lossoflight signal is intended to be driven by the Loss of Light output of an attached optical module; it signals that the optical receiver is not receiving illumination from the peer. If an optical module is not in use, this signal should be tied to 0.

The txinhibit signal is wired to the input of the transceiver but should also be connected to inhibit the optical transmitter in a connected module. If an optical module is not in use, this signal can be left as is.