The following ports added in version 8.9 of
the core. The hfec_fifo_latency_value output port is only
present in cores configured with a Hard FEC Wrapper.
| Port | Direction | Upgrade Action |
|---|---|---|
| hfec_fifo_latency_chx (15:0) | Out | Leave open |
| hfec_fifo_latency_rdy_chx | Out | Leave open |
| hfec_fifo_latency_ack_chx | In | Tie to 1 |
The following ports added in version 8.9 of the
core. The rsfec_clk input port is only present in cores
configured with a Hard FEC Wrapper.
| Port | Direction | Upgrade Action |
|---|---|---|
| rsfec_clk | In | In 24.3G Hard FEC cores this clock should be generated from the
rx_fast_clk (368.64 MHz). In 12.1G, 10.1G, and 8.1G Hard FEC cores this clock should be the same as the rx_fast_clk. |
| hyperframe_number | Out | Leave open |