Table: Reference Clock Frequencies for Device Families shows the reference clock frequencies that are supported by the IP for each family of Xilinx devices.
Line Rate Support |
Reference Clock Options (MHz) |
Default (MHz) |
---|---|---|
Up to 3,072.0 Mb/s |
122.88, 153.60 |
153.60 |
4,915.2 Mb/s on -1 speed grade devices |
122.88, 245.76 (does not support 3,072.0 Mb/s), 153.60, 307.20 |
307.20 |
Up to 6,144.0 Mb/s |
122.88, 153.60, 245.76, 307.20 |
307.20 |
Up to 9,830.4 Mb/s (1) |
7 series: 122.88, 153.60, 245.76, 307.20
|
307.20 |
Up to 10,137.6 Mb/s |
7 series: 307.20 |
307.20 |
UltraScale GTHE3: 307.20 |
307.20 |
|
UltraScale GTYE3/GTHE4/GTYE4: 245.76, 307.20 |
245.76 |
|
Up to 12,165.12 Mb/s |
7 series GTXE2:
|
380.16 |
7 series GTHE2:
|
368.64 |
|
UltraScale GTHE3 transceivers:
245.76 MHz for 12,165.12 Mb/s and 8,110.08 Mb/s; 307.2 MHz for other line rates
UltraScale GTYE3 and UltraScale+ GTHE4/GTYE4 transceivers:
|
245.76 |
|
Up to 24,330.24 Mb/s |
UltraScale GTYE3 transceivers:
UltraScale+ GTYE4 transceivers:
Versal™ ACAP GTY transceivers:
|
245.76 |
Notes: 1. For cores generated with 9.830G_and_under line rates, the 8,110.08 Mb/s line rate is not included. Use 12.165G_and under instead. |