Coarse Delay Measurement - 8.11 English

CPRI LogiCORE IP Product Guide (PG056)

Document ID
PG056
Release Date
2022-11-16
Version
8.11 English

If the C_R21_TIMER generic is set to TRUE, there is a counter in the core to assist in determining the round trip delay of the link. This is shown as the R21 Coarse Timer in This Figure . It can be read through the management interface (see Table: AXI4-Lite Memory Mapped Interface ). This timer runs at the same rate as datapath clock and the value is given in units of datapath clock cycles.