Hi-Speed Clock Domain - 8.11 English

CPRI LogiCORE IP Product Guide (PG056)

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8.11 English

When the R-21 timers are included the hi-speed clock domain is present. In the example design XDC, this clock is constrained to run at 250 MHz for cores supporting up to 3,072 Mb/s, at 333 MHz for cores supporting up to 9,830.4 Mb/s and at 380 MHz for cores supporting 10,137.6, 12,165.12 and 24,330.24 Mb/s.

create_clock -name hires_clk -period 4.000 [get_ports hires_clk]