RS-FEC Enabled Mode - 8.11 English

CPRI LogiCORE IP Product Guide (PG056)

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8.11 English

In Versal ACAP GTY, UltraScale GTYE3, and GTYE4 designs supporting the 24,330.24 Mb/s line rate, an RS-FEC option can be selected. FEC operation is only available on 64b/66b speeds, that is, 8,110.08, 10,137.6, 12,165.12, and 24,330.24 Mb/s. If the core speed switches down to an 8b/10b line rate, RS-FEC mode is automatically disabled. RS-FEC enabled line rates are independent from non-RS-FEC line rates.The RS-FEC is designed in accordance with CPRI Specification v7.0, October 9, 2015 [Ref 1] section 6.9.

The RS-FEC is instantiated between the core and the transceiver. When in FEC Enabled mode the RX gearbox block alignment mechanism is disabled because the RS-FEC performs its own codeword alignment. RS-FEC status information is available on the management interface and is described in Management Register Map . The additional latency added by the RS-FEC is described in Additional Pipeline Delays .

When using FEC Enabled mode the codeword alignment process can take much longer than the normal block alignment process used when in non FEC mode. This can add up to 1.3 ms to the time taken to complete L1 synchronization.