Free Run Clock Rate - 8.11 English

CPRI LogiCORE IP Product Guide (PG056)

Document ID
Release Date
8.11 English

This option is not available on Versal ACAP.

The core requires information on the frequency of the gtwiz_reset_clk_freerun_in clock input. The speed of the clock should be entered in MHz.

The frequency of this clock must be less than the internal frequency of the lowest line rate used. This ensures accurate running of the UltraScale GT wizard reset block.