The following ports have been added in version 8.7 of the core. The rxrecclkout port is present on UltraScale and UltraScale+ device-based cores. This port gives access to the RXRECCLKOUT port of the transceiver.
Port |
Direction |
Upgrade Action |
---|---|---|
stat_rx_delay_value |
Out |
Leave open |
Port |
Direction |
Upgrade Action |
---|---|---|
rxrecclkout |
Out |
Leave open |