Delay Through the GTHE3 Transceiver - 8.12 English - PG056

CPRI LogiCORE IP Product Guide (PG056)

Document ID
PG056
Release Date
2024-12-13
Version
8.12 English

Delay through the GTHE3 transceiver consists of a variable component (barrel shift or TX and RX gearbox latency) and a fixed component. The fixed component is made up of the delay shown in the following table.

Table 1. Fixed Contribution to Delay - GTHE3 Transceiver
Block Latency (UI)
TX 16-bit datapath cores (8b/10b) 95 UI
32-bit datapath cores (8b/10b) 175 UI
64-bit datapath cores (64b/66b) 144.5 UI
RX 16-bit datapath cores (8b/10b) 134.5 UI
32-bit datapath cores (8b/10b) 248.5 UI
64-bit datapath cores (64b/66b) 157.5 UI