Cores Supporting 4,915.2/6,144.0 Mb/s - 8.11 English

CPRI LogiCORE IP Product Guide (PG056)

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8.11 English

UltraScale architecture, Zynq-7000 SoC, Virtex-7, and Kintex-7 devices : The additional delay is eight datapath clock cycles, 160 UI in 16-bit datapath cores and 320 UI in 32-bit datapath cores.

Artix-7 devices : The additional delay is five datapath clock cycles plus three RECCLK cycles, or 260 UI.