Constants - 2024.2 English - UG901

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2024-12-11
Version
2024.2 English

SystemVerilog gives three types of elaboration-time constants:

  • parameter: Is the same as the original Verilog standard and can be used in the same way.
  • localparameter: Is similar to parameter but cannot be overridden by upper-level modules.
  • specparam: Is used for specifying delay and timing values; consequently, this value is not supported in Vivado synthesis.

There is also a runtime constant declaration called const.