Blocking and Non-Blocking Assignments - 2024.1 English

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2024-05-30
Version
2024.1 English

Vivado synthesis supports blocking and non-blocking assignments.

  • Do not mix blocking and non-blocking assignments.
  • Although Vivado synthesis synthesizes the design without error, mixing blocking and non-blocking assignments can cause errors during simulation.

For more information about the Verilog format for Vivado simulation, see Vivado Design Suite User Guide: Logic Simulation (UG900).