Supported Generate Statements - 2024.1 English

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2024-05-30
Version
2024.1 English

Vivado synthesis supports all Behavioral Verilog generate statements:

  • generate-loop (generate-for)
  • generate-conditional (generate-if-else)
  • generate-case (generate-case)