The following table shows the revision history for this document.
Section | Revision Summary |
---|---|
06/28/2024 Version 2024.1 | |
Targeting SystemVerilog for a Specific File | Updated the topic |
VHDL-2008 RESERVED Words | Updated the topic |
Asymmetric RAMs | Updated the topic |
RAM_DECOMP | Updated the topic |
MAX_FANOUT XDC Examples | Updated the topic |
SystemVerilog Constructs | Updated the topic |
Using Synthesis Settings | Updated the topic |
Running Synthesis with Tcl | Updated the topic |