Conditional Identifiers - 2024.1 English

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2024-05-30
Version
2024.1 English

Vivado synthesis supports conditional identifiers that can be used to control synthesis based on the Tool or the version.

For example, the following code will create an extra output if the Tool is a synthesis tool :


entity my_ent is port(
clk : in std_logic;
in1, in2 : in std_logic;
`if TOOL_TYPE = "SYNTHESIS" then
new_out : out std_logic;
`end if
out1 : out std_logic;

Vivado synthesis supports the following conditional identifiers.

Table 1. Conditional Identifiers
IDENTIFIER VALUE
VHDL_VERSION “2023.1”
TOOL_TYPE “SYNTHESIS”
TOOL_VENDOR “AMD/XILINX”
TOOL_NAME “Vivado”
TOOL_EDITION “ML Editions”
TOOLS_VERSION “2023.1”
VHDL_VERSION “2019”
Note: The values for these IDENTIFIERS are case sensitive.