VHDL Circuit Descriptions - 2024.1 English

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
Release Date
2024.1 English

A VHDL circuit description (design unit) consists of the following:

  • Entity declaration: Provides the external view of the circuit. Describes objects visible from the outside, including the circuit interface, such as the I/O ports and generics.
  • Architecture: Provides the internal view of the circuit, and describes the circuit behavior or structure.