Versal Adaptive SoC Ports and Attributes

Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002)

Document ID
AM002
Release Date
2023-10-26
Revision
1.3 English

The Versal adaptive SoC transceiver primitive contains ports and attributes that must be configured correctly for optimal performance. The user should rely on the Wizard to configure the transceiver when possible, and take care when performing manual configuration following the port and attribute descriptions in this document. Any port or attribute that is not explicitly described is assumed to be reserved, and its value should be left at the default generated by example designs from the Wizard or other IP cores.

The attributes in the Versal device transceiver primitive also carry labels for each of the described sub-fields. These are not actual names in the UNISIMs but descriptive titles of the sub-fields following a similar naming convention in the AMD UltraScale™ architecture documentation. The purpose of these is to help the user become familiar with the sub-fields and improve search efficiency while using this document.