The following table defines the GTY and GTYP transceiver Quad pins.
| Pins | Dir | Description |
|---|---|---|
|
MGTREFCLK0P MGTREFCLK0N |
In/Out (Pad) | Configured as either reference clock input pins or RX recovered clock output pins for the Quad. |
|
MGTREFCLK1P MGTREFCLK1N |
In/Out (Pad) | Configured as either reference clock input pins or RX recovered clock output pins for the Quad. |
|
CH[0/1/2/3]_GTYRXP/CH[0/1/2/3]_GTYRXN CH[0/1/2/3]_GTYPRXP/CH[0/1/2/3]_GTYPRXN |
In (Pad) | RXP and RXN are the differential input pairs for each of the receivers in the transceiver Quad. |
|
CH[0/1/2/3]_GTYTXP/CH[0/1/2/3]_GTYTXN CH[0/1/2/3]_GTYPTXP/CH[0/1/2/3]_GTYPTXN |
Out (Pad) | TXP and TXN are the differential output pairs for each of the transmitters in the transceiver Quad. |
| MGTAVTTRCAL | In (Pad) | Bias current supply for the termination resistor calibration circuit. See Termination Resistor Calibration Circuit. |
| MGTRREF | In (Pad) | Calibration resistor input pin for the termination resistor calibration circuit. See Termination Resistor Calibration Circuit. |
| GTY_AVCC | In (Pad) |
GTY_AVCC is the analog supply for the internal analog circuits of the GTY transceiver Quad tile. This includes the analog circuits for the PLLs, transmitters, and receivers. Most packages have multiple groups of power supply connections in the package for GTY_AVCC. Refer to the package pin definitions to identify in which power supply group a specific GTY transceiver Quad is located. For Versal adaptive SoCs, the nominal voltage is 0.88 VDC. |
| GTYP_AVCC | In (Pad) |
GTYP_AVCC is the analog supply for the internal analog circuits of the GTYP transceiver Quad tile. This includes the analog circuits for the PLLs, transmitters, and receivers. Most packages have multiple groups of power supply connections in the package for GTYP_AVCC. Refer to the package pin definitions to identify in which power supply group a specific GTYP transceiver Quad is located. For Versal adaptive SoCs, the nominal voltage is 0.92 VDC. |
| GTY_AVTT | In (Pad) |
GTY_AVTT is the analog supply for the transmitter and receiver termination circuits of the GTY and GTYP transceiver Quad tile. Most packages have multiple groups of power supply connections in the package for GTY_AVTT. Refer to the package pin definitions to identify in which power supply group a specific GTY or GTYP transceiver Quad is located. For Versal adaptive SoCs, the nominal voltage is 1.2 VDC. |
| GTY_AVCCAUX | In (Pad) |
GTY_AVCCAUX is the auxiliary analog LCPLL voltage supply for the transceivers. Most packages have multiple groups of power supply connections in the package for GTY_AVCCAUX. Refer to the package pin definitions to identify in which power supply group a specific GTY transceiver Quad is located. For Versal adaptive SoCs, the nominal voltage is 1.5 VDC. |
The preceding figure shows the external power supply connections with the GTY or GTYP transceivers. For GTYP_AVCC, the nominal voltage is 0.92 VDC.instead of 0.88 VDC.