Printed Circuit Board

Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002)

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1.3 English

Because the impedance between the power planes and GND has been kept low on the die and in the package, the board design has a much more relaxed requirement for decoupling on the printed circuit board. The primary purpose of the PCB decoupling capacitors is to provide noise isolation between the transceiver power supply pins and the external noise sources. Some examples of external noise sources are:

  • Power supply regulator circuits
  • On-board digital switching circuits
  • SelectIO™ signals from the Versal adaptive SoC

Decoupling capacitors should be provided on the PCB near the GTY transceiver power pins. These capacitors reduce the impedance of the PCB power distribution network. The reduced impedance of the PDN provides a means to attenuate noise from external sources before it can get into the device package power planes. The noise at the power pins should be less than 10 mVpp over the band from 10 kHz to 80 MHz.

Use the Power Design Manager (PDM) tool (download at to determine the PCB capacitor recommendations. The number and usage of GTY transceivers is used by PDM to calculate the decoupling capacitors required for each of the GTY transceiver analog power supplies. The GTY transceiver Quads are organized into power supply groups in the package. See Analog Power Supply Pins for the package being used.