Using the TX Buffer

Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002)

Document ID
AM002
Release Date
2023-10-26
Revision
1.3 English

Reset the TX buffer whenever CH*_TXBUFSTATUS indicates an overflow or underflow condition. The TX buffer can be reset by using the TX reset procedure or PCS component reset described in Transceiver TX Component Reset. This setting is used to enable the TX buffer to resolve phase differences between the PHYCLK and TXUSRCLK domains:

  • TX_PHASE_BUFFER_USE = 1'b1