Optimization Analysis - 2024.1 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2024-05-30
Version
2024.1 English

The opt_design command generates messages detailing the results for each optimization phase. After optimization you can run report_utilization to analyze utilization improvements. To better analyze optimization results, rerun opt_design with the -verbose and -debug_log options for complete details on how each optimization affects the logic and how user constraints prevent some optimizations. For more information, see this link and this link in the Vivado Design Suite User Guide: Implementation (UG904).