Checking for Multi-Fanout on the Output of Read Data Registers - 2024.1 English

UltraFast Design Methodology Guide for FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2024-05-30
Version
2024.1 English

The fanout of the data output bits from the memory array must be 1 for the second register to be absorbed by the RAM primitive. This is illustrated in the following figure.

Figure 1. Multiple Fanout Preventing Block RAM Output Register Inference